Enum PortSemantic 

pub enum PortSemantic {
    LinearPassive,
    Reactive,
    Nonlinear,
    ControlledConductance,
    VoltageConstraint,
}

Electrical behavior classification for a component port (pin pair).

Used by the compiler’s optimization legality checks to determine whether a subgraph can be safely lowered to IIR/BlackFeedback, or must remain as full MNA/WDF. Nonlinear and ControlledConductance ports create coupling barriers that prevent unsafe optimization.

Variants

LinearPassive

Fixed impedance — R, voltage source. Safe to lower/optimize.

Reactive

Stores energy between samples — C, L. Creates time-domain coupling.

Nonlinear

I(V) is nonlinear — diode junction, BJT Vbe/Vce, tube plate. Must be solved by NR or explicit solver. Optimization barrier.

ControlledConductance

Impedance varies with external control — JFET Rds, photocoupler LDR, pot. Optimization barrier when coupled to reactive/feedback nodes.

VoltageConstraint

Voltage constraint (virtual ground, VCVS output). Defines topology.

Trait Implementations

impl Clone for PortSemantic

fn clone(&self) -> PortSemantic

Returns a duplicate of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Copy for PortSemantic

impl Debug for PortSemantic

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl Eq for PortSemantic

impl PartialEq for PortSemantic

fn eq(&self, other: &PortSemantic) -> bool

Tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl StructuralPartialEq for PortSemantic