Struct PowerSupply
pub struct PowerSupply { /* private fields */ }Expand description
Power supply sag model for tube amp B+ rail behavior.
Models the real electrical phenomenon where the B+ supply voltage drops (“sags”) when the output stage draws more current than the supply can deliver instantly. The power supply has output impedance from:
- Rectifier forward voltage drop (tube: ~40-80V, solid-state: ~1-2V)
- Transformer winding resistance
- Filter capacitor ESR (equivalent series resistance)
The instantaneous sagged voltage is:
V_sagged = V_nominal - I_draw * Z_output
The filter capacitor provides energy storage that smooths the sag, creating the characteristic “spongy” compression feel. The RC time constant (Z_output * C_filter) determines how quickly the voltage recovers after a transient.
This is what distinguishes a Marshall Plexi (tube rectifier, high sag, spongy feel) from a Mesa Boogie (solid-state rectifier, stiff response).
Implementations§
§impl PowerSupply
impl PowerSupply
pub fn new(
nominal_voltage: f64,
impedance: f64,
filter_cap: f64,
rectifier: RectifierType,
sample_rate: f64,
) -> PowerSupply
pub fn new( nominal_voltage: f64, impedance: f64, filter_cap: f64, rectifier: RectifierType, sample_rate: f64, ) -> PowerSupply
Create a new power supply sag model.
nominal_voltage— No-load B+ voltage (e.g., 480V)impedance— Supply output impedance in ohms (tube rect: 50–200Ω, SS: 1–10Ω)filter_cap— Main filter capacitance in farads (e.g., 40µF)rectifier— Tube or solid-state rectifiersample_rate— Audio sample rate (Hz)
pub fn tick(&mut self, current_draw: f64) -> f64
pub fn tick(&mut self, current_draw: f64) -> f64
Process one sample: given the instantaneous current draw (A), returns the sagged supply voltage.
The model works as follows:
- The rectifier charges the filter cap toward V_nominal through Z_output.
- The load draws current from the cap, discharging it.
- The cap voltage is the actual supply voltage seen by the circuit.
The differential equation is:
C * dVcap/dt = (V_nominal - Vcap) / Z_output - I_load
Discretized (forward Euler):
Vcap[n+1] = Vcap[n] + dt/C * ((V_nominal - Vcap[n]) / Z_output - I_load)
pub fn set_sample_rate(&mut self, sample_rate: f64)
pub fn set_sample_rate(&mut self, sample_rate: f64)
Update the sample rate (recomputes dt/C).
pub fn reset(&mut self)
pub fn reset(&mut self)
Reset to nominal (no-load) state.
pub fn nominal_voltage(&self) -> f64
pub fn nominal_voltage(&self) -> f64
Get the nominal (no-load) voltage.
pub fn steady_state_voltage(&self) -> f64
pub fn steady_state_voltage(&self) -> f64
Get the steady-state output voltage at no load.
This accounts for the rectifier static voltage drop that is always present, even with zero current draw. The cap charges to nominal voltage, but the output seen by the circuit is always reduced by the rectifier forward voltage drop (tube: ~10V, solid-state: ~1.4V).
Use this to initialize set_supply_voltage() so the first audio
sample sees the same voltage the PSU will produce at idle.
Trait Implementations§
§impl Clone for PowerSupply
impl Clone for PowerSupply
§fn clone(&self) -> PowerSupply
fn clone(&self) -> PowerSupply
1.0.0 (const: unstable) · Source§fn clone_from(&mut self, source: &Self)
fn clone_from(&mut self, source: &Self)
source. Read more